Computer systems use memory devices, such as dynamic random access memory (DRAM) devices, to store data that are accessed by a processor. The memory devices may be used as system memory in a computer system. In some computer systems, the processor communicates with the system memory through a processor bus and a memory controller. The processor may issue a memory request, which includes a memory command, such as a read or write command, and an address designating the location from which data or instructions are to be read or written. The memory controller may use a command from the processor to generate appropriate command signals as well as row and column addresses that are applied to the system memory. In response to the commands and addresses, data are transferred between the system memory and the processor. The memory controller is often part of a system controller, which may also include bus bridge circuitry for coupling the processor bus to an expansion bus.
In general, continued gains in the operating speed for processors exceeds increases gained by memory devices and memory controllers that interface with the memory devices and processors. Thus, in some computer systems, a data bandwidth between the processor and the memory devices may be limited.
Thus, there is a general need for a method and apparatus for an efficient memory management and control protocol, including management and control of DRAM devices.